The present invention relates to a small size, light weight LSI (Large Scale Integrated circuit) package and, more particularly, to a chip size package (CSP).
In parallel with advances in semiconductor technologies, LSI chips evolved from semiconductor ICs (Integrated Circuits) and are increasing in integration scale. Today, it is even possible to accommodate the entire electronic apparatus in a single LSI chip. Portable computers, handy phones and digitized portable electronic apparatuses are recent achievements derived from the above circumstances. With these electronic apparatuses, there is an increasing demand for a small size, light weight configuration. To meet this demand, LSI packages for mounting LSI chips must be reduced in size and weight.
On the other hand, a large scale computer, telephone exchange or similar system is constituted by the combination of a great number of LSI chips. With this kind of system, it is necessary to promote rapid propagation of signals between the LSI chips, and therefore to reduce the distance between nearby LSI chips. This can be done most effectively if the size of the individual LSI package is reduced.
A small size, light weight LSI package can be implemented by a tape carrier system called TAB (Tape Automated Bonding) or a system allowing LSI chips, generally referred to as flip chips, to be directly mounted. TAB is described in detail in Japanese Patent Laid-Open Publication No. 4-252054. A flip chip is discussed in "Microelectronics Packaging Handbook: 6.3 CONTROLLED COLLAPSE CHIP CONNECTION (C4)" published by VAN NOSTRAND REINHOLD, 1989, pp. 366-373.
Recently, a chip size package (CSP) has been proposed in various forms as an LSI package capable of solving various problems of TAB and flip chips and having an extremely small size. CSPs are taught in Wakabayashi et al. "Chip Size Package", the SHM Society Report, Vol. 11, No. 5, Sep. 1, 1995, pp. 3-8, and Kata et al. "Trend of CSP Technology Development", the SHM Society Report, Vol. 11, No. 5, Sep. 1, 1995, pp. 9-13.
The problem with the conventional LSI package is that when implemented by TAB, the package has a contour noticeably grater than the contour of an LSI chip. On the other hand, when the flip chip scheme is used, it is difficult to guarantee reliability including the protection of the LSI chip.